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X Data Memory Space
— MSW[1:0] = 11 —The 8K higher locations ($A000 – $BFFF) of the internal
X memory and the 8K higher locations ($A000 – $BFFF) of the internal Y memory are
switched to internal program memory. In such a case, the on-chip program memory
occupies the lowest 48K locations ($0 – $BFFF) in the program memory space. The
instruction cache, if enabled, occupies the lowest 1 K program words (locations $0 –
$3FF). The lowest external program memory location in this mode is $18000, while
program memory locations $C000-$17FFF are considered reserved and should not be
accessed.
3.1.3 Instruction Cache
In program memory space, the lowest 1024 (1K) program words (at locations $0 – $3FF)
function as an internal instruction cache. When the instruction cache is enabled (that is, the CE
bit in the SR is set), the lowest 1K program words are reserved for the instruction cache and
should not be accessed for other purposes.
Note:
When using an enabled instruction cache, you must assign a valid value for the vector
address bus so that interrupts can be handled properly outside P:$0 – $3FF. (See the
memory diagrams, starting with Figure 3-2 , Memory Switch Off, Cache On, 24-Bit
Mode, on page 3-10.)
3.1.4 Program Bootstrap ROM
The program memory space occupying locations $FF0000–$FF00BF includes the internal
bootstrap ROM. This ROM contains the 192-word DSP56311 bootstrap program.
3.2 X Data Memory Space
The X data memory space consists of the following:
Internal X data memory (48K by default down to 8K)
Internal X I/O space (upper 128 locations)
Optional off-chip memory expansion (as much as 128K in 16-bit mode, or 256K in 24-bit
mode using the 18 external address lines, or 4 M using the external address lines and the
four address attribute lines). Refer to the DSP56300 Family Manual, especially Section 2 ,
Expansion Port , for details on using the external memory interface to access external X
data memory.
Note:
The X memory space at locations $FF0000 – $FFEFFF is reserved and should not be
accessed.
DSP56311 User’s Manual, Rev. 2
Freescale Semiconductor
3-3
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